Our Quantum Computers

OQC DIMON®

Our dual-rail encoded dimon qubit (DDQ) is purpose-built to reduce the dominant source of error in superconducting qubits by 10x. By encoding 2 qubits in 1, we can detect errors on an individual qubit level, with each lattice site on our chip containing a logical qubit. This unique 1:1 logical-to-physical qubit ratio enables us to significantly increase qubit quality, without adding hardware overhead, lightening the load on our control and cryogenics with an incredibly hardware-efficient design. 

Even better, it enables our future large-scale devices to be much more resilient to errors, and ultimately achieve the gold-standard of quantum error-correction and fault-tolerance with a far smaller physical hardware footprint than otherwise possible. 

Read more in our latest research about quantum error detection on the Dimon®.

OQC COAXMON®

The patented Coaxmon design uses three dimensional, out-of-plane control to remove our wiring from the chip itself, so that our qubits can be densely packed together. This architecture offers both the simplicity and compactness to scale, and the flexibility of designing increasingly smart generations of qubits — demonstrated as we move from the conventional transmon in our existing OQC Toshiko® device, to the dual-rail encoded dimon in OQC GENESIS. Each generation preserves the simplicity and compactness of the Coaxmon architecture that leads to its intrinsic scalability, while advancing quality through our novel qubit designs.